1. Technical Field
Various embodiments relate to a semiconductor integrated circuit, and more particularly, to a semiconductor apparatus and a test method using the same.
2. Related Art
A general semiconductor apparatus, for example, a semiconductor memory apparatus is configured to store data and output the stored data. In order to increase a data storage capacity of a semiconductor apparatus, a semiconductor apparatus in which memory dies for storing data are stacked has been used.
Referring to FIG. 1, a conventional semiconductor apparatus includes first to third memory dies 10 to 30 which are sequentially stacked.
The stacked first to third memory dies 10 to 30 are coupled to each other through through-silicon vias (TSVs). For example, the conventional semiconductor apparatus may include a plurality of data input/output TSVs DQ_TSV1, DQ_TSV2, and DQ_TSV3 as shown in FIG. 1.
The semiconductor apparatus configured in such a manner is commercialized and launched on the market, depending on a result obtained by testing whether or not the respective memory dies 10 to 30 normally store and output data.
A method for testing whether or not the respective memory dies 10 to 30 normally store and output data is performed as follows. First, the same data are stored in the respective memory dies 10 to 30, one of the first to third memory dies 10 to 30 is selected, and the data stored in the selected memory die is outputted. Then, another memory die is selected, and the data stored in the selected memory die is outputted.
For example, high-level data are stored in the first to third memory dies 10 to 30. Then, the first memory die 10 among the first to third memory dies 10 to 30 is selected, and the data stored in the first memory die 10 are outputted through the first to third data input/output TSV DQ_TSV1, DQ_TSV2, and DQ_TSV3. Then, whether all of the data outputted from the first memory die 10 are at a high level or not is checked. After the test for the first memory die 10 is ended, the second memory die 20 is selected. The data stored in the second memory die 20 are outputted through the first to third data input/output TSV DQ_TSV1, DQ_TSV2, and DQ_TSV3. Then, whether all of the data outputted from the second memory die 20 are at a high level or not is checked. After the test for the second memory die 20 is ended, the third memory die 30 is selected. The data stored in the third memory die 30 are outputted through the first to third data input/output TSV DQ_TSV1, DQ_TSV2, and DQ_TSV3. Then, whether all of the data outputted from the third memory die 30 are at a high level or not is checked.
In the conventional semiconductor apparatus, the respective memory dies stacked therein are tested as the above. Therefore, the number of tests to be performed is decided according to the number of memory dies stacked in the semiconductor apparatus. Accordingly, when the test number of the semiconductor apparatus increases, the productivity of the semiconductor apparatus decreases.